Summary
Semiconductors · Terminology · ExplainerBusiness Next · 11 Aug 2026
Decoding the names · four generations
The Longer the Name, the Bigger the Thing Being Sold
H100 is a single GPU, GB200 is a superchip, GB200 NVL72 is an entire rack. They sit at different tiers and cannot be compared with one another — which is the correct opening point of a Business Next explainer on NVIDIA's naming. What that piece does not draw out is the rule running underneath it: the names grow longer because the thing NVIDIA sells grows bigger. Chip, then chip welded to a CPU, then rack, then data-centre platform — every extra tier in a name marks the product boundary moving outwards once more. And in the current generation one name obeys none of it. That exception marks precisely where NVIDIA's silicon stopped being NVIDIA's own design.
A decoder, and the pattern under it The model numbers can be parsed. Parsing them shows you the product boundary.
- 7chips in the Vera Rubin platform; NVIDIA's own January technical blog still said six
- 5rack-scale systems those seven chips are built into
- 72 / 36the shape NVL72 names — GPUs to CPUs, unchanged from GB200 to Vera Rubin
- $20bnthe reported cost of the LPU technology that became the seventh chip
The Decoder
Letters, digits and tiers Three tiers name three different kinds of object. Comparing across them means nothing.
| Tier | Example | What the name says |
|---|---|---|
| Single GPU | H100, B100 | The leading letter is the architecture — H for Hopper, B for Blackwell. The digits separate products within one generation and are not a performance rank across generations. |
| Superchip | GH200, GB200 | G is the Grace CPU, so both architectures appear in the name. GB200 is one Grace CPU with two Blackwell GPUs. |
| Rack system | GB200 NVL72 | NVL means NVLink-connected and the number is the GPU count: 72 Blackwell GPUs and 36 Grace CPUs in one liquid-cooled rack, behaving as a single very large GPU. |
The naming convention is itself checkable, and it checks out. GPU architectures take a scientist's surname — Hopper (Grace Hopper), Blackwell (David Harold Blackwell), Rubin (Vera Rubin), Feynman (Richard Feynman). CPUs take a forename — Grace, Vera, Rosa. Vera Rubin uses the full name precisely because the platform pairs a Vera CPU with a Rubin GPU, which is neat confirmation that the two halves of the rule are real rather than coincidental. The name NVL72, meanwhile, survives from the GB200 generation into Vera Rubin. Every part inside it has changed; the geometry it describes — 72 GPUs, 36 CPUs — has not. The name persists because the shape does.
- surname / forenameGPU architectures take the surname, CPUs the forename. Knowing the rule lets you parse a name you have never seen.
- 3naming tiers — single chip, superchip, rack system. Not comparable with one another.
- 72the number in NVL72 is the count of NVLink-connected GPUs, not a performance figure.
Four Generations
From one chip to a data centre Each generation's break happens one layer further out than the last.
- 2022Hopper (Grace, TSMC 4N) — the first generation with an engine built for Transformers, so the GPU is no longer merely good at general parallel work. What is sold is a chip: H100, H200, and GH200 once a CPU is welded on.
- 2024Blackwell (Grace, TSMC 4NP) — the break is scale rather than the die. GB200 NVL72 puts 72 GPUs and 36 CPUs into one liquid-cooled rack, and what is sold becomes compute, networking, power and cooling together.
- 2026Vera Rubin (Vera, TSMC 3nm) — seven chips forming five rack-scale systems. NVIDIA now describes the product in racks and PODs, and the unit of sale is a data-centre platform. Huang's own summary is “seven breakthrough chips, five racks, one giant supercomputer” — a sentence containing no single product number at all.
- 2028Feynman (Rosa, expected) — the first to use copper and co-packaged optics together inside the rack, paired with a next-generation LP40 LPU. The process node is reported rather than confirmed.
The Exception
The seventh chip is not NVIDIA's design The one name that breaks the rule marks where the design stopped being theirs.
NVIDIA's own technical blog, published on 5 January 2026, is titled “Six New Chips, One AI Supercomputer”. Its GTC press release of 16 March 2026 says seven, and names the addition: the “newly integrated” NVIDIA Groq 3 LPU. The difference between those two documents is the whole of the answer — the platform gained a chip between January and March, and it is the one NVIDIA did not design. Behind it sits a deal reported at about $20 billion for Groq's LPU technology, surfacing in late December 2025; outlets describe it variously as an acquisition, an acqui-hire and a non-exclusive licence, and this project could not establish which is accurate. The chip is reported to be made by Samsung on a 4nm process. That last point is worth stating in a Taiwanese trade context in particular: the source gives a TSMC node for all four architecture generations, and none for this seventh chip.
- six → sevenbetween the January blog and the March release, the platform gained a chip.
- Samsung 4nmthe reported process for the seventh chip; all four generations are TSMC. One secondary source, not confirmed at first hand.
- 256LPU processors in the LPX rack, with 128GB of on-chip SRAM and 640 TB/s of bandwidth.
The one name that is not a scientist
Every other part obeys the surname-and-forename convention. “Groq 3 LPU” carries a company's name instead. The break in the naming rule falls exactly where the design changed hands — which says more about NVIDIA now than any of the naming rules the source sets out.
Who is Rosa named after? Two answers
The source says Rosalind Franklin, the British scientist behind the DNA image “Photo 51”. Other coverage points instead to Rosalyn Sussman Yalow, the American medical physicist and 1977 Nobel laureate, and reports that the CPU was previously called “Rosalyn”. Both fit the forename convention, so the convention cannot settle it; the “formerly Rosalyn” detail is specific and leans towards Yalow. This project could not reach an NVIDIA statement naming the person, so both are recorded.
The performance figures are NVIDIA's, not verified
“One-fourth the number of GPUs compared with Blackwell” for training large mixture-of-experts models; “up to 10x higher inference throughput per watt at one-tenth the cost per token”; “up to 35x higher inference throughput per megawatt” for LPX paired with Vera Rubin. All are from NVIDIA's own release, and this page quotes them as vendor claims rather than as findings.